Gapped signals are widely used in Optical Transport Network (OTN) applications, broadcast video as well as many other application areas. One of the requirements of an OTN is to insert plesiochronous payloads into an OTN wrapper. That is, because the data transmission rate and the rate of the payload source may not be exactly the same, they may drift with respect to one another. One approach to solve the issue to is to generate a reference clock with missing clock edges (or gaps) to maintain the incoming and outgoing data rates synchronized.
A gapped signal by its nature carries significant jitter, which usually is not tolerated by the downstream consumer circuitry. A jitter attenuating Phase Locked Loop (PLL) circuit is typically used to create an output signal that has the same average frequency as the gapped signal with the jitter component attenuated.
A frequency synthesizer may utilize a gapper and a jitter attenuating PLL to receive an input signal with frequency fi and generate an output signal with frequency fo, where D=1/R=fi/fo is usually a rational number. The frequency ratio R can be a rational number expressed as a ratio of integer numbers, S/T.
FIG. 1 illustrates a frequency synthesizer 100 employing a gapper 110 and integer dividers 120, 135, and 134 to generate an output signal 102 with a desired frequency. In the illustrated embodiment, the frequency synthesizer 100 comprises a gapper 110, a PLL 130, and a first integer divider 120 coupled between the gapper 110 and the PLL 130. The first integer divider 120 has an integer divide ratio of N2. The PLL 130 comprises a phase detector 131 coupled with a loop filter 132, an oscillating component, e.g., a Digital-Controlled Oscillator (DCO) 133 or Voltage Controlled Oscillator (VCO), coupled with the loop filter 132, a second integer divider 134 with an integer divide ratio of N3 coupled with the DCO 133. The second integer divider 134 operates to generate an output signal 102 of the frequency synthesizer 100. The PLL also comprises a third integer divider 135 with an integer divide ratio of N1 and disposed in the feedback loop. The gapper 110 can operate to divide a clock signal by a non-integer value, usually a national number (ratio of two integers), e.g., G=P/Q.
Conventionally, a PLL is set to a low bandwidth in order to attenuate the jitter from the gapped signal generated by a gapper, which greatly limits the applications of the PLL. For example, a bandwidth of 300 Hz is specified in ITU-T G.8251 for demapping purposes. Plus, the resultant jitter attenuation efficiency is also typically unsatisfactory.